Lead Mechanical Engineer, Hardware Test (X-BAT) (R5271) with Security Clearance
Shield AI Inc
Times Square, King County136k–136k
Posted 8/25/2026
Senior Yield Engineer: Defect Reduction & Optimization
Vanguard International Semiconductor Corporation
Singapore720–1kPosted 8/22/2026
Free to start — build an ATS-friendly resume that matches this listing, no sign-up required.
About this role
Vanguard International Semiconductor Corporation (VIS) is seeking a Senior YE Engineer to supervise inline shift operations and drive for defect reduction and yield improvement. The role includes training technicians, maintaining SOPs, and performing advanced failure analyses with FIB/SEM/EDX to ensure wafer quality. The ideal candidate holds an engineering degree and has 2–8 years of fab experience in a multinational environment, with strong EHSS compliance and leadership abilities. J-18808-Lj…
Read the full description and requirements on the original posting.
Tailor your resume for this Senior Yield Engineer: Defect Reduction & Optimization role
Vanguard International Semiconductor Corporation and most employers screen applications with ATS software before a recruiter reads them, and they rank resumes that echo the language of the posting. To stand out for this role, mirror the exact skills, tools, and job title it uses, and make your location (Singapore) clear. For engineering roles like this one, recruiters commonly scan for:
- AutoCAD
- SolidWorks
- MATLAB
- Project Management
- GD&T
- PLC
- FEA
- Revit
Tailr does this for you: paste this listing and it builds an ATS-friendly resume matched to it, with a live score that climbs as your resume aligns with what this role needs.
Build a matching resume — freeFrequently asked questions
Is the Senior Yield Engineer: Defect Reduction & Optimization role at Vanguard International Semiconductor Corporation remote?
This role is based in Singapore. Check the original posting for any hybrid or remote flexibility.
What does the Senior Yield Engineer: Defect Reduction & Optimization role at Vanguard International Semiconductor Corporation pay?
The listed pay is 720–1k. Salaries vary with experience and location — treat this as a guide and confirm on the original posting.
How do I apply for this Senior Yield Engineer: Defect Reduction & Optimization job?
Applications happen on the employer's own site — use the "Apply on company site" link on this page. Before you apply, tailor your resume to the listing so it clears the ATS.
How do I tailor my resume for this Senior Yield Engineer: Defect Reduction & Optimization role?
Open Tailr's builder and it creates an ATS-friendly resume matched to this listing — pulling in the role's keywords and the skills engineering recruiters scan for — with a live match score as you edit. It's free to start and needs no sign-up.
Similar engineering jobs
Electrical Engineer I (TX) with Security Clearance
Shield AI Inc
Times Square, King County118k–118kPosted 8/25/2026
Engineering - Technician
Marriott
SingaporePosted 8/23/2026
Project Engineer
Eaton Corporation
SingaporePosted 8/23/2026
Listing sourced via Adzuna. Tailr indexes public job postings so you can tailor your resume to them — applications happen on the employer's site.